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| Single Inline Memory Module |
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| Dual Inline Memory Module |
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| Rambus Inline Memory Module |
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Term
| Dynamic Random Access Memory |
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| Static Random Access Memory |
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Term
| Error Checking and Correction |
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| A single stick of memory that is treated as two sticks by the system. |
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Definition
| Allows two memory banks to work as a sychronized set. |
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| Synchronous Dynamic Random Access Memory |
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| Memory that shares a common clock signal with the computer's system-bus clock. |
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| Memory that transfers data on both the rising and falling of the clock signal. |
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Definition
| This is double the actual clock rate. |
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Definition
| Transfers data at Quadruple the effective clock rate. |
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Definition
| Can perform 8 operations per clock cycle |
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| Direct Rambus Dynamic RAM |
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| Single Channel memory using an 8 byte data bus. Capable of producing 800MBs on a 100MHz clock. |
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Term
| Small Outline Dual Inline Memory Module |
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Term
| Laptop DIMM containing 144 or 172 pins on a 64 bit bus. |
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Definition
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Term
| Laptop DIMM containing 72 or 100 pins on 32 bit bus or 144 or 200 pins on a 64 bit bus |
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| How many RIMM slots must be filled on a motherboard? |
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| The I/O address of Primary IDE |
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| The I/O address of Secondary IDE |
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Term
| Card Services and Socket Services |
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Definition
| What services support smartcards? |
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